- Each day of PIRL’20 starts with a presentation panel. Full-length talks will be available the Monday prior via links below.
- During the live panel, speakers will give a 5 minute summary of their work and then there will be a moderated Q&A.
- Keynotes will be live.
- To access the Zoom for the workshop, you’ll need to register at least 48 hours prior to the session you’d like to “attend”.
FRIDAY, OCTOBER 16
10:00 am – 11:00 am
Presentation Panel 1
Chair: Jim Fister, Independent Contractor, SNIA
Transactional Graph Processing in Persistent Memory
Speaker: Philipp Götze, TU Ilmenau
We start the presentation by introducing our lessons learned from the application of Persistent Memory (PMem) in our preliminary work.
Afterwards, we examine PMem as a very promising technology for graph processing.
We present a novel architecture for transactional processing of queries and updates on a property graph model.
Its design builds on the previously introduced lessons learned and special characteristics of Intel’s Optane Persistent Memory.
Particularly, we look at the storage model, query processing, and transaction processing and present first evaluation results.
I am a research associate and PhD candidate at the TU Ilmenau, Germany.
I am working on Persistent Memory (PMem) topics since 2017.
Since August 2017 our group is part of a funded project targeting PMem as a modern storage solution.
Since 2019 we have a server equipped with Intel Optane DC PMM on which I have already implemented, evaluated, and supervised several projects.
This includes various designs of B+-Trees, LSM-Trees, and other data structures as well as more complex storage layouts.
Planning to fail with reverse psychology
Speaker: Steve Heller, 2Misses Corp.
Many people talk about power failure resilience and testing but not many people show how they accomplish these tasks. In this talk, I present a minimal working example of how to write code to allow a program to resume where it left off when restarting after a power failure.
I am the developer of the TwoMisses persistent memory hash table.
TwoMisses can provide near- or sub-microsecond latencies (95th percentile) for access by key to a terabyte or more of data (e.g., 1 billion records of 1kb each) stored on Intel® Optane™ DC Persistent Memory, depending on the exact hardware and operating system configuration.
TwoMisses is implemented in C++ and runs on 64-bit versions of Windows 10 and Ubuntu.
Cross-Failure Bug Detection in Persistent Memory Programs
Speaker: Sihang Liu, University of Virginia
Ensuring a consistent recovery in event of a failure is one of the key requirements for programs based on the persistent memory. The recoverability not only depends on the execution before the failure but also on the recovery and resumption after failure. We refer to these two stages as the pre- and post-failure execution stages. An incorrect interaction between the pre- and post-failure stages can cause inconsistencies in persistent data. In this talk, I will first categorize the cause of such incorrect cross-failure interactions, and then introduce our tool XFDetector that detects them.
Sihang Liu is a 5th year Ph.D student at the University of Virginia, advised by Professor Samira Khan. Before pursuing the doctoral degree, he has obtained Bachelor’s degrees from both the University of Michigan and Shanghai Jiaotong University. Sihang Liu’s primary research interest lies in the software and hardware co-design for persistent memory systems.
11:00 am – 12:00 pm
The reality of using Intel Optane persistent memory with a SQL In-Memory Database
Speaker: Doug Hood, Oracle
Everybody wants faster access to their data, but DRAM is expensive and limited in size. Persistent memory promises larger capacity at a cheaper price point, but with a higher latency than DRAM.
This talk investigates how Intel Optane persistent memory used in both App Direct Mode and Memory Mode works with the Oracle TimesTen In-Memory Database.
SQL benchmarks based on customer workloads are used to measure persistent writes, database load times and latency/throughput. The effects of cache hit ratios, concurrency and reads vs writes are considered.
As a developer and product manager for an In-Memory database, persistent memory is a big deal.
Understanding the engineering tradeoffs for DRAM, PMem, NVMe storage and RDMA are critical for design and execution of the worlds fastest databases.
Benchmarking technologies like Intel Optane persistent memory with customer workloads reveals the reality of these technologies beyond the marketing hype.
Doug is an evangelist for Oracle TimesTen In-Memory Database, Oracle In-Memory and Oracle NoSQL.
12:00 pm – 1:00 pm
Software-defined Memory Service Combining Persistent Memory and DRAM
Speaker: Charles Fan, MemVerge
While persistent memory has higher density and lower cost than DRAM, it is also slower than DRAM. The byte-addressable persistence can not be fully exploited without application change. These are a few of the problems for applications to adopt persistent memory. MemVerge developed a software called Memory Machine that manages DRAM and Persistent Memory together, and make them available to applications as software. This software-defined memory paradigm makes it possible to deliver memory service that is big, low cost and performant. MemVerge also developed an in-memory snapshot capability that takes advantage of persistence characteristics of the persistent memory to protect the data.
Charles Fan is co-founder and CEO of MemVerge, an early-stage startup building Memory-Converged Infrastructure software on top of the new persistent memory technologies. Prior to MemVerge, Charles was a SVP/GM at VMware, responsible for VMware’s storage business unit and the big data group. He led the teams that created industry-transforming products including Virtual SAN. Charles received his Ph.D. and M.S. in Electrical Engineering from the California Institute of Technology, and his B.E. in Electrical Engineering from the Cooper Union.
FRIDAY, OCTOBER 23
10:00 am – 11:00 am
Presentation Panel 2
Chair: Steven Swanson, UCSD
How this experiment ends: The long tale of persistent memory enabling
Speaker: Dan J Williams, Intel
At PIRL 2019 I told the story of surviving an encounter with the 3rd rail of Linux filesystems. While that survival felt like a capstone event that established “The Programming Model” in Linux it left a series of unanswered questions and feature requests in its wake. To this day, mounting a filesystem in DAX mode throws an “EXPERIMENTAL” warning to the system log. What remaining challenges warrant that continued designation? From a wider view, what does a kernel practitioner see as the next opportunities for Linux to better support the industry’s “experiment” with persistent memory?
Dan Williams is a Principal Engineer at Intel. For the past 5 years he has been involved in the design, development, and maintenance of the Linux kernel’s Persistent Memory (PMEM / NVDIMM) and Direct Access (DAX) facilities.
C++ persistent containers in PMDK
Speaker: Szymon Romik, Igor Chorazewicz, Intel
Persistent Memory is a paradigm shifting technology, however, writing software for it may be counterintuitive at times. To make PMEM programming feel more idiomatic in C++, we have developed libpmemobj-cpp, a library that is bundled with a suite of libraries called Persistent Memory Development Kit (PMDK). Key components of this library constitute its persistent containers, resembling the ones in the Standard Template Library (STL) in C++. This talk will present the main concepts, design choices, and issues related to both single-threaded and concurrent data structures for persistent memory.
Igor and Szymon are software engineers working at Intel for the PMDK project. The area of their interest is focusing on C++ enablement, key-value datastores, and programming model.
We Replaced SSD With Storage Class Memory And Here Is What We Learned
Speaker: Alexandra (Sasha) Fedorova, University of British Columbia / MongoDB
On April 2, 2019 Intel Optane Persistent Memory became the first commercially available storage class memory (SCM). We were interested to learn how SCM affects performance of applications. We compared the performance of MongoDB’s storage engine WiredTiger on two Optane storage devices: one packaged as SCM and another packaged as SSD. Although these devices deliver vastly different performance when accessed in a raw form, their performance under the entire software stack, including OS, file system and the application, is not that different, because in-memory caches effectively mask latency.
I am a professor at the University of British Columbia. My research focuses broadly on systems, and I am especially interested in memory management and solving the “memory wall” problem. I investigate use cases for persistent memory as part of my consulting work at MongoDB.
Is Persistent Memory Persistent?
Speaker: Terence Kelly, Unaffiliated, Haris Volos, University of Cyprus
Applications protect data integrity against crashes by using update mechanisms that are atomic with respect to failure. Unfortunately, the checkered history of such mechanisms precludes blind trust. This talk describes the design and implementation of a simple and cost-effective testbed for subjecting applications running on a complete hardware/software stack to repeated sudden whole-system power interruptions. The talk will furthermore present our findings when we used such a testbed to evaluate a crash-tolerance mechanism for persistent memory by subjecting it to over 50,000 power failures.
Haris Volos is an Assistant Professor at the University of Cyprus in the Department of Computer Science. Previously, he worked at Hewlett Packard Labs and Google, after receiving his Ph.D. from the University of Wisconsin-Madison. His research interests span broad areas of computer systems, including computer architecture, systems software, and non-volatile memory systems. Currently, he is exploring tools and techniques for improving the reliability of persistent memory software.
11:00 am – 12:00 pm
Driving Technology adoption – Persistent Memory: Opportunities, Approaches and Learnings
Speaker: Samir Raizada, Verizon Media
This talk is about driving technology in general and persistent memory in particular. I will cover the opportunities persistent memory presents, how we drove the efforts to adopt the technology, how we challenged our architects and developers to come up with ideas and build solutions through brainstorming and hack events. I will discuss outcomes of these events, potential open source projects that can be useful for the industry. I will end with lessons learnt and suggestions for vendors, partners and industry as a whole.
I am an Architect in Verizon Media’s Performance Engineering Group with more than 10 years at the company. I explore new technologies and their applications for our workloads, and evangelize those to our numerous properties. I have been working on the evaluation and application of 3D Xpoint and Persistent Memory to real-world use-cases for about three years now.
12:00 pm – 1:00 pm
Software Implications of Persistent Memory and Architectural Support
Speaker: William Wang, Arm Research
This presentation will talk about software implications of persistent memory, highlighting two software implications/problems: 1) the read-of-not-yet-persisted-write problem for concurrent programs, and the architectural proposal to get that fixed with persistent atomics, and 2) the implications of persistent memory on sequential programs running on weak memory models such as Arm’s.
William Wang is a researcher at Arm Research in Cambridge, where he leads the systems research on non-volatile memories. His current research focus is on addressing the persistent memory programming challenges with the right architectural and microarchitectural support.
FRIDAY, OCTOBER 30
10:00 am – 11:00 am
Presentation Panel 3
Chair: Andy Rudoff, Intel
Evaluation of In Cache Line Logging On Intel Optane Persistent Memory
Speaker: David Teksen Aksun, EPFL
Intel has released Intel Optane PM in 2019. Instead of emulation techniques, we can use Optane to evaluate previous design approaches for building durable data structures.
In this talk, we focus on the in cache line logging (Incll) approach, which puts a log inside a cache line to avoid cache line write-backs in the critical path of the application, as a suitable example. We evaluate Incll with Intel Optane to show that it is a good time to reconsider previous design ideas as Optane characteristics are important. We leave the solution, which uses Optane efficiently, for another talk.
David Aksun is a last year PhD student working with Prof. James Larus in EPFL VLSC. For his PhD thesis, David is working on building tools and applications for persistent memory.
David’s research mainly focuses on runtime performance and recovery of data structures and in-memory key-value stores using persistent memory. He has experience with Optane. He built program analysis tools for persistent memory. Before persistent memory, he did machine learning.
Towards Easier Persistence-Aware Programming: A Deep Reinforcement Learning Approach
Speaker: Hanxian Huang, UCSD
The widely-used method to perform persistence memory-aware programming requires in-depth code changes using an NVMM-aware library, which is labor-intensive and error-prone. To address this problem, we try to introduce a deep reinforcement learning approach to help ease the persistence-aware programming. Given C, C++ or Java volatile source codes, our deep reinforcement learning model will help generate the corresponding non-volatile-aware codes based on PMDK library and the persistency will be checked by PMEMCHECK and PM-Reorder. Then the codes will be further improved by debugging tools. Experiments show that we can help generate persistence-aware programs with similar performance compared to the experts’ codes, which reduces the labor on modifying existing data structure and also reduces bugs in persistence-aware programming.
Hanxian Huang is currently working toward the Ph.D. degree of Computer Science and Engineer Department at University of California, San Diego. She received his B.S. degree in Computer Science from Peking University in 2019. Her current research is mainly focused on machine learning accelerator, software-hardware codesign and machine learning for system/architecture design.
Lock-free Concurrent Level Hashing for Persistent Memory
Speaker: Zhangyu Chen, Huazhong University of Science and Technology
We propose clevel hashing, a lock-free concurrent level hashing, to deliver high performance with crash consistency for persistent memory. In the clevel hashing, we design a multi-level structure for concurrent resizing and queries. Resizing operations are performed by background threads without blocking concurrent queries. For concurrency control, atomic primitives are leveraged to enable lock-free search/insertion/update/deletion. We further propose context-aware schemes to guarantee the correctness of interleaved queries. Our evaluation results show the efficiency of clevel hashing.
Zhangyu Chen is a Ph.D student in Huazhong University of Science and Technology. His research areas include the architecture and computer systems for persistent memory. His recent work is about lock-free index design for PM. To provide fast queries for PM, a PM-friendly and lock-free concurrent hashing scheme, called clevel hashing, is proposed with high throughput and low latency. The paper of clevel hashing has been published in USENIX ATC 2020 and the open-source code is released in Github.
11:00 am – 12:00 pm
Oracle Exadata – How did we harness the power of PMEM?
Speaker: Jia Shi, Oracle
Persistent memory accomplishes near-DRAM performance, yet ensures data persistence across power failures. Oracle Exadata X8M was launched in late 2019, delivering the first PMEM accelerator for database in industry. Exadata X8M combines the power of PMEM and RoCE to deliver a record-setting 19 microsecond SQL read latency, 16 million SQL read IOPS per rack, and 8x faster log commits! In this session, Jia will unravel the secret behind the amazing database performance records, explaining how her team harnessed this disruptive technology to drive database innovation.
Jia Shi is Vice President of Exadata Development at Oracle. Exadata is an engineered system that provides the best performance, scalability and high availability for running all types of Oracle Database workloads. Jia led the team that developed Exadata X8M’s industry leading performance using Persistent Memory technology and RoCE networking to deliver 19 microsecond SQL read latency!
12:00 pm – 1:00 pm
Persistent Memory as a Game Changer for a Data-Centric World
Speaker: Dieter Kasper, Fujitsu
Since four decades all Operating System and Application Development is built on the foundation of the Memory – Disk relationship. The introduction of persistent memory in the standard hardware will lead to a disruptive change in application design as we can only see once in an IT career. In this talk, the technology will be presented together with the environment in which it is embedded to discuss the expectations and challenges associated with it. Finally, an outlook is given on what future directions are conceivable.
Dieter Kasper serves as CTO Enterprise Platform Services of Fujitsu Technology Solutions GmbH since 2016. With over 30 years’ experience in Enterprise IT, he has been elected as Fujitsu Fellow in 2017. Dieter is responsible for understanding and predicting IT trends that benefit customers most, as well as for their implementation in the Fujitsu ‘s Mainframe strategy. His current focus is on the areas of Digital Transformation, Machine Learning, Artificial Intelligence and Persistent Memory.
1:00 pm – 1:15 pm