The final week of PIRL is here! We have keynotes from Oracle and Fujitsu and a panel of speakers from top universities.
Oracle Exadata – How did we harness the power of PMEM?
Jia Shi (Oracle)
Abstract: Persistent memory accomplishes near-DRAM performance, yet ensures data persistence across power failures. Oracle Exadata X8M was launched in late 2019, delivering the first PMEM accelerator for database in industry. Exadata X8M combines the power of PMEM and RoCE to deliver a record-setting 19 microsecond SQL read latency, 16 million SQL read IOPS per rack, and 8x faster log commits! In this session, Jia will unravel the secret behind the amazing database performance records, explaining how her team harnessed this disruptive technology to drive database innovation.
Biography: Jia Shi is Vice President of Exadata Development at Oracle. Exadata is an engineered system that provides the best performance, scalability and high availability for running all types of Oracle Database workloads. Jia led the team that developed Exadata X8M’s industry leading performance using Persistent Memory technology and RoCE networking to deliver 19 microsecond SQL read latency!
Persistent Memory as a Game Changer for a Data-Centric World
Dieter Kasper (Fujitsu)
Abstract: Since four decades all Operating System and Application Development is built on the foundation of the Memory – Disk relationship. The introduction of persistent memory in the standard hardware will lead to a disruptive change in application design as we can only see once in an IT career. In this talk, the technology will be presented together with the environment in which it is embedded to discuss the expectations and challenges associated with it. Finally, an outlook is given on what future directions are conceivable.
Biography: Dieter Kasper serves as CTO Enterprise Platform Services of Fujitsu Technology Solutions GmbH since 2016. With over 30 years’ experience in Enterprise IT, he has been elected as Fujitsu Fellow in 2017. Dieter is responsible for understanding and predicting IT trends that benefit customers most, as well as for their implementation in the Fujitsu ‘s Mainframe strategy. His current focus is on the areas of Digital Transformation, Machine Learning, Artificial Intelligence and Persistent Memory.
Evaluation of In Cache Line Logging On Intel Optane Persistent Memory
David Teksen Aksun (EPFL)
Abstract: Intel has released Intel Optane PM in 2019. Instead of emulation techniques, we can use Optane to evaluate previous design approaches for building durable data structures.
In this talk, we focus on the in cache line logging (Incll) approach, which puts a log inside a cache line to avoid cache line write-backs in the critical path of the application, as a suitable example. We evaluate Incll with Intel Optane to show that it is a good time to reconsider previous design ideas as Optane characteristics are important. We leave the solution, which uses Optane efficiently, for another talk.
Towards Easier Persistence-Aware Programming: A Deep Reinforcement Learning Approach
Hanxian Huang (UCSD)
Abstract: The widely-used method to perform persistence memory-aware programming requires in-depth code changes using an NVMM-aware library, which is labor-intensive and error-prone. To address this problem, we try to introduce a deep reinforcement learning approach to help ease the persistence-aware programming. Given C, C++ or Java volatile source codes, our deep reinforcement learning model will help generate the corresponding non-volatile-aware codes based on PMDK library and the persistency will be checked by PMEMCHECK and PM-Reorder. Then the codes will be further improved by debugging tools. Experiments show that we can help generate persistence-aware programs with similar performance compared to the experts’ codes, which reduces the labor on modifying existing data structure and also reduces bugs in persistence-aware programming.
Lock-free Concurrent Level Hashing for Persistent Memory
Zhangyu Chen (Huazhong University of Science and Technology)
Abstract: We propose clevel hashing, a lock-free concurrent level hashing, to deliver high performance with crash consistency for persistent memory. In the clevel hashing, we design a multi-level structure for concurrent resizing and queries. Resizing operations are performed by background threads without blocking concurrent queries. For concurrency control, atomic primitives are leveraged to enable lock-free search/insertion/update/deletion. We further propose context-aware schemes to guarantee the correctness of interleaved queries. Our evaluation results show the efficiency of clevel hashing.